From 320d92e542f62473f3bc84fdf32defb5b2741fdc Mon Sep 17 00:00:00 2001 From: Jana Rekittke Date: Sat, 4 Jul 2009 11:25:04 +0200 Subject: simplify generator --- src/back/generator.py | 57 +++++++++++---------------------------------------- 1 file changed, 12 insertions(+), 45 deletions(-) diff --git a/src/back/generator.py b/src/back/generator.py index b743684..56a143c 100644 --- a/src/back/generator.py +++ b/src/back/generator.py @@ -63,57 +63,26 @@ class Generator(object): # pass 1 - generate non-label ops for tac in self.tac_list: if isinstance(tac, TAC): - if tac.op == Op.ADD: - self.emit("ADD r%d, r%d, r%d" % (tac.arg1, tac.arg1, tac.arg2)) - elif tac.op == Op.SUB: - self.emit("SUB r%d, r%d, r%d" % (tac.arg1, tac.arg1, tac.arg2)) - elif tac.op == Op.MUL: - self.emit("MUL r%d, r%d, r%d" % (tac.arg1, tac.arg1, tac.arg2)) - elif tac.op == Op.DIV: - self.emit("DIV r%d, r%d, r%d" % (tac.arg1, tac.arg1, tac.arg2)) - elif tac.op == Op.MOD: - self.emit("MOD r%d, r%d, r%d" % (tac.arg1, tac.arg1, tac.arg2)) - elif tac.op == Op.AND: - self.emit("AND r%d, r%d, r%d" % (tac.arg1, tac.arg1, tac.arg2)) - elif tac.op == Op.OR: - self.emit("OR r%d, r%d, r%d" % (tac.arg1, tac.arg1, tac.arg2)) + if tac.op in [Op.ADD, Op.SUB, Op.MUL, Op.DIV, Op.MOD, Op.AND, Op.OR]: + self.emit("%s r%d, r%d, r%d" % (tac.op, tac.arg1, tac.arg1, tac.arg2)) elif tac.op == Op.NOT: - r = Register().new() - self.emit("MOV r%d, 0" % r) - self.emit("CMP r%d, r%d" % (tac.arg1, r)) - self.emit("EQ r%d" % (tac.arg1)) + self.emit("CMP r%d, r0" % tac.arg1) + self.emit("EQ r%d" % tac.arg1) elif tac.op == Op.MINUS: self.emit("SUB r%d, r0, r%d" % (tac.arg1, tac.arg1)) - elif tac.op == Op.STORE: - offset = Scope().get_variable_offset(tac.arg1) - self.emit("SW bp, r%d, %d" % (tac.arg2, offset * 4)) - elif tac.op == Op.LOAD: + elif tac.op in [Op.STORE, Op.LOAD]: offset = Scope().get_variable_offset(tac.arg1) - self.emit("LW bp, r%d, %d" % (tac.arg2, offset * 4)) + self.emit("%s bp, r%d, %d" % (tac.op, tac.arg2, offset * 4)) elif tac.op == Op.MOV: self.emit("MOV r%d, %d" % (tac.arg1, tac.arg2)) elif tac.op == Op.CMP: self.emit("CMP r%d, r%d" % (tac.arg1, tac.arg2)) - elif tac.op == Op.EQ: - self.emit("EQ r%d" % tac.arg1) - elif tac.op == Op.NE: - self.emit("NE r%d" % tac.arg1) - elif tac.op == Op.LT: - self.emit("LT r%d" % tac.arg1) - elif tac.op == Op.LE: - self.emit("LE r%d" % tac.arg1) - elif tac.op == Op.GE: - self.emit("GE r%d" % tac.arg1) - elif tac.op == Op.GT: - self.emit("GT r%d" % tac.arg1) - elif tac.op == Op.BEZ: - self.emit(tac) - elif tac.op == Op.JMP: + elif tac.op in [Op.EQ, Op.NE, Op.LT, Op.LE, Op.GE, Op.GT]: + self.emit("%s r%d" % (tac.op, tac.arg1)) + elif tac.op in [Op.BEZ, Op.JMP]: self.emit(tac) - elif tac.op == Op.PUSH: - self.emit("PUSH r%d" % tac.arg1) - elif tac.op == Op.POP: - self.emit("POP r%d" % tac.arg1) + elif tac.op in [Op.PUSH, Op.POP]: + self.emit("%s r%d" % (tac.op, tac.arg1)) elif tac.op == Op.CALL: self.emit(tac) self.emit("ADD r%d, r0, rv" % tac.arg2) @@ -159,9 +128,7 @@ class Generator(object): self.__op_list = map(replace_pseudo_regs, self.__op_list) self.__op_list = [".REGS %d" % Register().count] + self.__op_list - # print code - #for i in range(len(self.__op_list)): - # print "%04d: %s" % (i, str(self.__op_list[i])) + # finally, print the generated code print "\n".join(self.__op_list) def get_label_offset(self, name, tac): -- cgit v1.2.3