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-rw-r--r--src/emu/cpu.c2
-rw-r--r--src/emu/cpu.h2
-rw-r--r--src/emu/mem.c8
-rw-r--r--src/emu/risci.c4
-rw-r--r--src/emu/syscall.c2
-rw-r--r--src/front/ast.py4
6 files changed, 10 insertions, 12 deletions
diff --git a/src/emu/cpu.c b/src/emu/cpu.c
index 1ac1517..fc3d229 100644
--- a/src/emu/cpu.c
+++ b/src/emu/cpu.c
@@ -13,7 +13,7 @@
#include "syscall.h"
/* stack pointer register */
-uint32_t SP;
+uint32_t StP;
/* base pointer register */
uint32_t BP;
diff --git a/src/emu/cpu.h b/src/emu/cpu.h
index 6f2a077..b580672 100644
--- a/src/emu/cpu.h
+++ b/src/emu/cpu.h
@@ -18,7 +18,7 @@ enum {
void trap(int num);
/* stack pointer */
-extern uint32_t SP;
+extern uint32_t StP;
/* base pointer */
extern uint32_t BP;
diff --git a/src/emu/mem.c b/src/emu/mem.c
index 21caafd..5ab8389 100644
--- a/src/emu/mem.c
+++ b/src/emu/mem.c
@@ -33,14 +33,14 @@ uint32_t load(size_t addr)
void push(uint32_t value)
{
//debug("push(%"PRIu32")", value);
- GPR[SP] -= 4;
- store(GPR[SP], value);
+ GPR[StP] -= 4;
+ store(GPR[StP], value);
}
uint32_t pop(void)
{
- uint32_t tmp32 = load(GPR[SP]);
+ uint32_t tmp32 = load(GPR[StP]);
//debug("pop(%"PRIu32")", tmp32);
- GPR[SP] += 4;
+ GPR[StP] += 4;
return tmp32;
}
diff --git a/src/emu/risci.c b/src/emu/risci.c
index a7c99bf..adae285 100644
--- a/src/emu/risci.c
+++ b/src/emu/risci.c
@@ -55,9 +55,9 @@ void read_program(const char *program)
/* initialize pseudo registers */
BP = reg_size - 3;
- SP = reg_size - 2;
+ StP = reg_size - 2;
RV = reg_size - 1;
- GPR[BP] = GPR[SP] = mem_size;
+ GPR[BP] = GPR[StP] = mem_size;
GPR[RV] = 0;
assert(read(pfd, MEM, sb.st_size - sizeof(inst_t)) == (ssize_t)(sb.st_size - sizeof(inst_t)));
diff --git a/src/emu/syscall.c b/src/emu/syscall.c
index 92cab22..c573a94 100644
--- a/src/emu/syscall.c
+++ b/src/emu/syscall.c
@@ -7,7 +7,7 @@
#include "mem.h"
#include "syscall.h"
-#define arg(n) load(GPR[SP] + 4*n)
+#define arg(n) load(GPR[StP] + 4*n)
void do_syscall(void)
{
diff --git a/src/front/ast.py b/src/front/ast.py
index 8b86cdd..a3613c2 100644
--- a/src/front/ast.py
+++ b/src/front/ast.py
@@ -82,9 +82,7 @@ class Sequence(Statement):
def generate(self, before, after, last):
self.debug("Sequence.generate(before = %d, after = %d): %s" % (before, after, repr(self)))
- if not self.s1:
- self.s2.generate(before, after, last)
- elif not self.s2:
+ if not self.s2:
self.s1.generate(before, after, last)
else:
label = self.newlabel()